eppl_avr8_init.h

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/*
   Copyright (c) 2013, Radoslaw Koppel
   All rights reserved.

   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
   
    - Redistributions of source code must retain the above copyright
      notice, this list of conditions and the following disclaimer.
      
    - Redistributions in binary form must reproduce the above copyright
      notice, this list of conditions and the following disclaimer in the
      documentation and/or other materials provided with the distribution.

    - Neither the name of the copyright holders nor the
      names of its contributors may be used to endorse or promote products
      derived from this software without specific prior written permission.

   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
   ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
   WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
   DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER BE LIABLE FOR ANY
   DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
   LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
   ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
   SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef EPPL_AVR8_INIT_H_INCLUDED
#define EPPL_AVR8_INIT_H_INCLUDED

   #define EPPL_avr8_init_isPORTSET(param, bit) ( (EPPL_PORTNR(bit) == EPPL_PORTNR(param)) && EPPL_avr8_mode_modifiedReg(PORT, EPPL_GC(param), EPPL_GC(bit)) && EPPL_avr8_mode_valuePORT(EPPL_GC(bit)) )
   
   #define EPPL_avr8_init_isPORTCLR(param, bit) ( (EPPL_PORTNR(bit) == EPPL_PORTNR(param)) && EPPL_avr8_mode_modifiedReg(PORT, EPPL_GC(param), EPPL_GC(bit)) && !EPPL_avr8_mode_valuePORT(EPPL_GC(bit)) )

   #define EPPL_avr8_init_isDDRSET(param, bit)  ( (EPPL_PORTNR(bit) == EPPL_PORTNR(param)) && EPPL_avr8_mode_modifiedReg(DDR, EPPL_GC(param), EPPL_GC(bit)) && EPPL_avr8_mode_valueDDR(EPPL_GC(bit)) )
   
   #define EPPL_avr8_init_isDDRCLR(param, bit)  ( (EPPL_PORTNR(bit) == EPPL_PORTNR(param)) && EPPL_avr8_mode_modifiedReg(DDR, EPPL_GC(param), EPPL_GC(bit)) && !EPPL_avr8_mode_valueDDR(EPPL_GC(bit)) )

#define eppl_avr8_InitReg(reg, port, default, pinconfigs...) \
   *EPPL_avr8_CPORTREG(reg, port) = (\
   EPPL_avr8_mode_value##reg(default) ? \
      (0xff & ~EPPL_GETSUBSET(EPPL_avr8_init_is##reg##CLR, EPPL_SC(EPPL_DEFPP(port, 0), default), EPPL_extractPinPos, |, pinconfigs) ) \
      : \
      EPPL_GETSUBSET(EPPL_avr8_init_is##reg##SET, EPPL_SC(EPPL_DEFPP(port, 0), default), EPPL_extractPinPos, |, pinconfigs) \
   )

#define eppl_avr8_InitOnePort(port, default, pinconfigs...) \
   do{\
      if(EPPL_avr8_CPORTREG(PORT, port) != NULL) \
      {\
         eppl_avr8_InitReg(PORT, port, default, pinconfigs); \
         eppl_avr8_InitReg(DDR,  port, default, pinconfigs); \
      }\
   }while(0)

#endif /* EPPL_AVR8_INIT_H_INCLUDED */